AMD Athlon 6 Specifikace stáhnout pdf (Strana 57)

Product Errata 57

Revision Guide for AMD Athlon™ 64 and AMD Opteron™ Processors

25759 Rev. 3.79 July 2009

96 Increased Memory Latency During P-State Changes

Description

The memory controller's idle counters are dynamically managed to help reduce page misses and

conflicts. When LDTSTOP is asserted for a P-state (frequency) change, the memory controller

incorrectly waits for the idle counters to expire before placing DRAM in self-refresh. This has the

effect of increasing memory latency (up to 256 memory clocks in rare cases) during P-state changes.

Potential Effect on System

The slight increase in memory latency may lead to performance anomalies depending on buffering

capabilities of external devices.

Suggested Workaround

None.

Fix Planned

Yes

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AMD Athlon 6 Specifikace Strana 57